QaSimDemo - Qualitative Analysis of Analog Circuits
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Attention:
This Demo works only with old Java-Workshop (JDK1.0).
Introduction:
At the beginning of a design process the designer has to
verify which circuit structure is suitable for a given
purpose. At this stage numerical and symbolic analysis are of
little use. There are no numerical values for conventional
simulation with programs like SPICE and a Symbolic Analysis
would produce large symbolic expressions. No further
approximation of these expressions can be performed due to the
lack of numerical values.
An experienced designer however, is able to analyze the
behavior of an unknown circuit. The Qualitative Analysis
reproduces this ability on computers by introducing qualitative
states such as positive, zero, or
negative.
The applet is a graphical user interface to the QA Server. The QA
Server performs the computations and runs on the same computer
(www.nst.ing.tu-bs.de,
SUN Ultra450) as the WWW Server.
With this demo version DC and Small-Signal Analyses of the
following circuit structure can be performed:
The QA Server uses this netlist:
Astable Multivibrator
*
R1 1 2 +
R2 2 0 +
R3 4 0 +
R4 5 0 +
R5 1 3 +
C1 4 5 + IC = -
Q1 3 2 4 QN
Q2 1 3 5 QN
VS 1 0 +
.MODEL QN NPN ( QADCAC=MINB )
.END
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QaSimDemo Applet
The main window can be opened again after quitting by
pressing the button.
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Usage:
- Options & Defaults:
-
- Expand Node and Loop Equations
- Generate additional node and loop equations
- Display System of Equations
- Display the qualitative system of equations
- Display Solved Equations
- Show the equation numbers while solving the
system of equations
- Vector Pointer / Vector Array
- Switches between different internal data structures
- Analysis:
-
- Start DC Analysis
- Start a DC Analysis. You must set the
states of the nonlinearities
(transistors) with Set Nonlinears before.
With Use Initial Conditions the initial
conditions of the dynamic elements are taken into
account.
- Start Small-Signal Analysis
- Start a Small-Signal Analysis. You must set the
states of the nonlinearities
(transistors) with Set Nonlinears and the
small-signal models of the dynamic
elements (capacitors) with Set Dynamics
before. With Check Operating Point an
additional DC Analysis validates the operating point.
- Console Messages:
- You can watch the solving process here. If the window
Error Message appears displaying an equation, this
equation leads to a contradiction.
Example (DC Analysis):
- Choose Analysis
- Click on Set Nonlinears, the window States of
Nonlinearities appears
- Click on Apply
- Click on Done
- Click on Start DC Analysis, the window
Results appears
- Click on Select All
- Click on Display
- The result will be shown
Interpretation of the Result:
The choosen states of the transistors are valid. There are three
possible states of the circuit caused by the uncertain branch
voltage U(C1).
Bipolar Transistor States:
| OFF | Off
|
| FON | Forward On
|
| RON | Reverse On
|
| FST | Forward Saturation
|
| RST | Reverse Saturation
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Small-Signal Models of Capacitances:
| OL | Open Loop
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| RS | Resistance
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| SC | Short Circuit
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Hints & FAQ:
The FAQ (hopefully) answers the most
common questions.
Please direct additional notices, questions, and suggestions to
webmaster@nst.ing.tu-bs.de!
References:
- M. Thole, J. Meise, E.-H. Horneber,
Qualitative Analysis of Nonlinear Dynamic Circuits,
Proceedings of 2nd International Conference on Intelligent
Systems Engineering, Hamburg, September 1994
- M. Thole, J. Meise, E.-H. Horneber,
Evaluating Possible States of Nonlinear Dynamic Networks
by Use of Qualitative Analysis
Proc. 3rd Int. Workshop on Symbolic Methods and Applications
to Circuit Design (SMACD'94), Seville, October 1994
- M. Thole, E.-H. Horneber,
Qualitative Analysis of Analog Circuits with Expanded
Node and Loop Equations,
Proc. 3rd IEEE Int. Conf. on Electronics, Circuits,
and Systems ICECS '96, Rodos, October 1996
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