A DC Analysis validates the transistor states and computes the set of possible network states. Capacitances are replaced by open loops and inductances by short circuits.
A Small-Signal Analysis computes possible network states for very small signals. Only the signal variations are calculated. Therefore a [+] denotes increasing not positive.
Yes! Omitting all input signals we would expect that the set of possible network states contains only the trivial solution zero. However not all circuits show this behavior indicating an instable operating point. The example circuit is instable for Q1 = FON, Q2 = FON, and C1 = RS with three possible solutions.
The server was written in C++. The netlist parser was generated with PCCTS.
Visual JavaTM - the java GUI builder of the Java WorkShopsTM - aided the development of this applet.